Quantum Voltage Comparator for 0.07 mum CMOS Flash A/D Converters

نویسندگان

  • Jincheol Yoo
  • Kyusun Choi
  • Jahan Ghaznavi
چکیده

This paper presents a new voltage comparator design called Quantum Voltage (QV) comparator for the next generation deep sub-micron low voltage CMOS flash A/D converter (ADC). Unlike the traditional differential voltage comparators designed to minimize input-offset voltage error due to the mismatches in a differential transistor pair, the QV comparators are designed to optimize the inputoffset voltages by systematically and uniformly varying the transistor sizes of the differential transistor pair. The QV comparators allow very small voltage comparison, complete elimination of resistor ladder circuit, and dramatic improvement of linearity in an ADC.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A Study on the Offset Voltage of Dynamic Comparators

Dynamic latched comparators are most used in analog-to-digital converters. In this paper expressions for the calculation of the offset voltage for two most used topologies are derived. These expressions corroborate previously stated results with analytical support as well as providing useful insight for the design of these comparators by analyzing the influence of each transistor pair individua...

متن کامل

A Tiq Based Cmos Flash A/d Converter for System-on-chip Applications

The analog-to-digital converter (ADC) is an essential part of system-on-chip (SoC) products because it bridges the gap between the analog physical world and the digital logical world. In the digital domain, low power and low voltage requirements are becoming more important issues as the channel length of MOSFET shrinks below 0.25 sub-micron values. Moreover, SoC trends force ADCs to be integrat...

متن کامل

Power and Area Efficient FLASH ADC Design using 65nm CMOS Technology

ABSTRACT This paper presents a design of a high speed Comparator design using 65nm digital CMOS technology on Cadence Virtuoso Design Tool. The proposed FLASH ADC Design consists of fully differential topology. The first stage provides a Voltage Divider circuit and the second stage is Comparator Design having high sampling frequency tolerance, and the high efficient common drain circuit provide...

متن کامل

Low Power Low Voltage Current Mode Pipelined A/D Converters

This paper presents two prototypes of low power low voltage current mode 9 bit pipelined a/d converters. The first and the second converters are configured of 1.5 bit and 2.5 bit stages, respectively. The a/d converter structures are composed of current mode building blocks and final comparator block which converts the analog current signal into digital voltage signal. All building blocks have ...

متن کامل

Spatial Filtering in Flash A/D Converters

Averaging networks suppress the random mismatch between the comparators in flash A/D converters (ADCs), but an analytical understanding does not exist, nor a method for optimal design. This paper unifies various forms of offset averaging and derives the optimum by treating the averaging network as a spatial filter. At the optimum, the offsets in terms of LSB are minimized with almost no loss in...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2003